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Ships within 48 hours · Estimated delivery Jul 29 - Aug 3
High density
4Gb/s peak bandwidth (x36 at 1200 MHz clock frequency) • Organization – 64 Meg x 18
Conditon: new
NXP:S912ZVCA19F0MLF
Cable length: 150cm
Micron Technology DRAM RLDRAM2, Part #MT41K128M16JT-125 AAT:K TR | Dynamic random access memory | DEX STMICROELECTRONICS High densityThe 1. 35V DDR3L SDRAM device is a low voltage version of the 1. 5V DDR3 SDRAM device. Refer to the DDR3 (1. 5V) SDRAM data sheet specifications when running in 1. 5V compatible mode. Features VDD = VDDQ = 1. 35V (1. 2831. 45V) Backward compatible to VDD = VDDQ = 1. 5V 0. 075V Differential bidirectional data strobe 8n bit prefetch architecture Differential clock inputs (CK, CK#) 8 internal banks Nominal and dynamic on die termination (ODT) for data,
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